Minicomputer
DEC PDP-8
The original table-model PDP-8 put a complete computer on a desk. Its standard system had 4096 words of core memory, an operator console, and a Teletype. A direct-address addition took 3.2 µs.
- Manufacturer
- Digital Equipment Corporation
- Released
- 1965
- Region
- United States
- Record status
- approved
The original PDP-8's console and enclosure at the Science Museum, London. The standard Teletype and full installation are not shown; the photograph does not establish the fitted memory capacity.
About this machine
DEC offered the PDP-8 as a complete computer for calculation and control. This record covers the original table model with its standard processor, ferrite-core memory, operator console, and Model 33 ASR Teletype. Later PDP-8 models and optional memory extension, arithmetic hardware, and CRT displays are outside this configuration.
The Computer History Museum calls the PDP-8 the first commercially successful minicomputer. It contrasts the desk-sized machine and its lower price with a small IBM System/360, and credits that combination with bringing minicomputers into laboratories, offices, and industrial plants.
Instructions and data share the fitted core, with 12 bit per word. The processor works through an accumulator and carry link. An instruction can directly address the first page of memory or the page it occupies; other pages need an indirect pointer. Separate instructions handle input/output and operations on processor registers. Auto-index registers help step through lists in memory. An interrupt sends a running program to a device-service routine; the separate data-break facility lets a peripheral transfer words directly to or from core through the memory buffer.
The console switches let an operator load an address, deposit a word in core, examine memory, and advance a program by one cycle or instruction. The register lamps showed what the processor was doing. The Teletype accepted keyboard or paper-tape input and produced typed or punched output. DEC supplied a symbolic assembler that produced program tape, a FORTRAN compiler, a debugger, and a tape editor. Its Floating Point Package performed arithmetic in software.
DEC specifies a 1.6 µs computer cycle. Table 1 rates direct-address TAD (two's-complement add) at 3.2 µs; indirect addressing adds another cycle. These timings do not establish a nominal processor clock.
Configuration
Original table model with standard core and Teletype ASR
| Component | Role | Count | Clock | Capacity |
|---|---|---|---|---|
| DEC PDP-8 processor | Main CPU | 1 | unknown Nominal clock | — |
| DEC PDP-8 standard core memory | System memory | 1 | — | 4096 words |
Figures for the whole machine
| Metric | Value | Evidence | Basis | Method | Source |
|---|---|---|---|---|---|
| Memory capacity (words) whole-system | 4096 words | Confirmed | Vendor-rated | Design capacity Stated by the vendorStandard table-model configuration with its single fitted core. The standard configuration has one program-memory pool. Processor registers, the Teletype's paper tape, and optional memory extension are excluded. The source counts words of 12 bit each, so this figure is not a byte capacity. Word counts from machines with different word widths are not like-for-like bit-capacity comparisons. |
3 documented absences
| Metric | Value | Evidence | Basis | Method | Source |
|---|---|---|---|---|---|
| Clock frequency gpu | not applicable The standard table-model configuration has no graphics processor. CRT display equipment was optional. | Not stated | Vendor-rated | Nominal clock Stated by the vendor | |
| Memory bandwidth memory | unknown DEC specifies a data-break transfer interval for peripheral access to core memory, not a general memory-transfer bandwidth. | Not stated | Vendor-rated | Theoretical peak Stated by the vendor | |
| Rated power consumption whole-system | unknown DEC gives a power-dissipation figure without stating whether it includes the Teletype supplied with the standard installation. | Not stated | Vendor-rated | Rated power Stated by the vendor |
Figures for its components
| Metric | Value | Evidence | Basis | Method | Source |
|---|---|---|---|---|---|
| Instruction execution time cpu | 3.2 µs | Confirmed | Vendor-rated | Addition instruction Stated by the vendorDirect-address TAD Y instruction in DEC Table 1. The table's time is for direct addressing. Indirect addressing adds one computer cycle; this is an instruction time, not a processor clock. |
2 documented absences
| Metric | Value | Evidence | Basis | Method | Source |
|---|---|---|---|---|---|
| Clock frequency cpu | unknown The checked brochure specifies a computer-cycle duration rather than a nominal processor oscillator frequency. | Not stated | Vendor-rated | Nominal clock Stated by the vendor | |
| Peak FP32 rate cpu | not applicable The standard processor has no native floating-point hardware. DEC describes floating-point operations through a software package. | Not stated | Vendor-rated | Theoretical peak Stated by the vendor |
| Metric | Value | Evidence | Basis | Method | Source |
|---|---|---|---|---|---|
| Memory capacity (words) memory | 4096 words | Confirmed | Vendor-rated | Design capacity Stated by the vendorStandard fitted core with its native word width. This is a word count for the fitted core, with 12 bit per word, not a byte-addressed capacity. Optional memory extension is excluded. |
Editorial notes
This is the original PDP-8, often called the Straight-8. Later machines with related names and optional extensions are outside this record.